1. Field of the Invention
The present invention relates to a bus checking device and a bus checking method for checking for occurrence of signal conflict or floating on buses with tri-state element structure existing in logic circuits.
2. Description of the Background Art
If buses with tri-state element structure existing in a logic circuit cause signal conflict or floating, large current may flow to cause destruction or deterioration of the device.
The bus checking methods for checking for possibility of signal conflict or floating of buses include a method of checking the collision and floating by checking whether the buses are always exclusively controlled or not, that is, by checking bus signal values on the basis of results of logic simulation.
Conventionally, such a bus checking device as shown in FIG. 35 has been used for this bus checking method. In the figure, 1 denotes a net list with description of connection relation of a designed integrated circuit, 100 denotes net list input means for inputting the net list 1 for the entire integrated circuit, 104 denotes an input pattern for simulation to be applied to external input terminals of the integrated circuit, 101 denotes input pattern input means for inputting the input pattern 104 for the simulation, 102 denotes bus signal determining means for determining bus signals by performing the simulation using the input pattern inputted from the input pattern input means 101, 103 denotes signal conflict.multidot.floating deciding means for deciding signal conflict or floating using bus signals determined by the bus signal determining means and 7 denotes an exclusiveness information file of buses for storing information related to exclusiveness of the buses decided by the signal conflict.multidot.floating deciding means 103.
The procedure of the bus checking method using such a bus checking device as formed as shown in FIG. 35 will be described using the flow chart shown in FIG. 36. First, after it starts, the net list input means 100 in the bus checking device reads the net list 1 in the step S160. The read net list 1 is inputted into the bus signal determining means 102. Then in the step S161, the bus signal determining means 102 specifies buses composed of tri-state elements using the inputted net list 1.
In the step S162, the bus checking device reads all the input patterns 104 for simulation with the input pattern input means 101. The read input patterns 104 are inputted into the bus signal determining means 102 from the input pattern input means 101. Then in the step S163, the bus signal determining means 102 performs the simulation using the net list and one input pattern. Subsequently, the bus signal determining means 102 determines values of signals on the buses composed of the tri-state elements.
Next, in the step S164, the signal conflict.multidot.floating deciding means 103 finds one bus of which bus signal value is not confirmed out of the specified buses. In the step S165, the signal conflict.multidot.floating deciding means 103 makes a decision as to whether the bus signal value is 1 or 0 or not as the result of the simulation. If the bus signal value is not 1 or 0, it proceeds to the next step. If the signal conflict.multidot.floating deciding means 103 decides that 1 or 0 is outputted as a value of the bus signal as the result of the simulation in the step S165, it skips the step S166 and proceeds to the next process. In the step S166, an instance (a name) of the bus and the input pattern are displayed.
In the step S167, the signal conflict.multidot.floating deciding means 103 makes a decision as to whether signal values have been confirmed about all the specified buses. If there remain any buses which have not been confirmed yet, the signal conflict.multidot.floating deciding means 103 returns to the step S164 and repeats the operation described above. If signal values have been confirmed about all the buses, the signal conflict.multidot.floating deciding means 103 proceeds to the next step.
In the step S168, the signal conflict.multidot.floating deciding means 103 makes a decision as to whether the logic simulation has been performed about all the input patterns. If there remain input patterns which have not been executed yet, the signal conflict.multidot.floating deciding means 103 returns to the step S163 and repeats the above-described operation. The signal conflict-floating deciding means 103 ends the processing when it decides that there are no more input patterns which have not been executed.
The conventional bus checking device, which is formed as described above and checks the exclusiveness of busses according to the procedure as described above, has a problem that sufficient checks can not be made because the exclusiveness in relation to the input patterns only is checked while the bus control signals must always be exclusive.
It also has a problem that correct checks can not be accomplished because the signal conflict.multidot.floating of buses is determined on the basis of the bus signal values.